https://wccftech.com/intel-sapphire-rapids-hbm-xeon-scalable-cpus-with-64-gb-hbm2e-memory-offer-up-to-3x-performance-increase-over-ice-lake-xeons/

Intel has once again demonstrated its upcoming Sapphire Rapids HBM Xeon Scalable CPUs with up to 64 GB HBM2e memory in various workloads.

According to Intel, the Sapphire Rapids-SP will come in two package variants, a standard, and an HBM configuration. The standard variant will feature a chiplet design composed of four XCC dies that will feature a die size of around 400mm2. This is the die size for a singular XCC die and there will be four in total on the top Sapphire Rapids-SP Xeon chip. Each die will be interconnected via EMIB which has a pitch size of 55u and a core pitch of 100u.