https://wccftech.com/intel-showcases-packaging-prowess-7nm-ponte-vecchio-xe-hpc-gpu-100-billion-transistors/

Yesterday, during the Intel unleashed webcast, CEO, Pat Gelsinger, unveiled new details of the 7nm Xe-HPC-based Ponte Vecchio GPU which is planned to be the largest and most chip designed to date. The Ponte Vecchio GPU will be making use of several key technologies that were highlighted which will power 47 different compute tiles based on different process nodes and architectures.

The Intel Ponte Vecchio GPU is first and foremost based on the Xe-HPC graphics architecture which is the flagship product leveraging Intel's 7nm EUV process node. But aside from that, the chip has a ton of other compute tiles that are based on different process nodes, all of which merge into one singular exascale graphics processing unit known as Ponte Vecchio. We already gave a run-down of what the complete Ponte Vecchio GPU has to offer and you can read a more detailed post on that here.