AMD Discloses Its Multi-Layer Chiplet Design Era, Starting With Zen 3 With 3D Stacked V-Cache Technology
https://wccftech.com/amd-discloses-multi-layer-chip-design-era-starting-with-zen-3-with-3d-stacked-v-cache-technology/
AMD has further detailed its future Multi-Layer Chiplet Design technologies which are going to be integrated within next-generation processors such as the upcoming Zen 3 chips with 3D V-Cache technology.
The company talked about its existing chiplet designs and what the future holds in terms of multi-layer chip progression at HotChips 33. Currently, there are 14 package architectures for chiplets in development for various products that have already been released or coming out really soon. AMD states that the packaging choice and chiplet architecture depends on performance, power, area & the cost of the respective product (PPAC in short).