https://www.sciencedaily.com/releases/2019/10/191022112135.htm

Compared to traditional analog architectures and methodologies, the design turnaround time for these novel sensor interfaces is reduced from months to hours. The drastic reduction in the design effort is highly beneficial in cost-sensitive silicon systems, such as sensors for the Internet of Things (IoT). The novel data converter architecture also has very low complexity, reducing the silicon area and hence the manufacturing cost by at least 30 times, compared to conventional designs.

Such novel data converters also exhibit the unprecedented capability of gracefully degrading the signal fidelity when its supply voltage or clock frequency experience wide fluctuations. Such fluctuations are common in energy-harvested IoT sensors, being that the power harvested from the surrounding environment (e.g., solar cell) is highly erratic. In turn, this allows uninterrupted sensor signal monitoring even under unfavourable harvested power conditions, and without voltage regulation. Instead, traditional data converters suffer from catastrophic resolution degradation when the supply voltage is below its minimum rated value Vmin (or the frequency exceeds its maximum rated value) hence needing power-hungry circuits for voltage and frequency regulation.