https://wccftech.com/amd-renoir-mobility-pcie-3-0-limited-to-8x-could-bottleneck-gpus-above-an-nvidia-rtx-2060-super/

AMD's Renoir SOC has just got its first legitimate platform block diagram leaked courtesy of the venerable Igor over at Igor's Lab. The source in question has a spotless track record with leaks and we have no reason to doubt the legitimacy of the slide. The AMD Renoir SoC block diagram (for the mobility platform) reveals that dedicated GPUs will only have access to 8 lanes of PCIe 3.0 which could run high-end GPUs into a bandwidth bottleneck (think RTX 2060 Super and above).

Interestingly, this limitation does not apply to desktop (AM4-based) Renoir SOC as confirmed by Robert Hallock. The reason appears to be that while the AM4-based platform has access to 16 lanes of PCIe 3.0, the mobility platform is using a crippled version of the SoC for energy efficiency purposes and will only be able to utilize 8 lanes for a dedicated GPU. This amount of bandwidth is enough for GPUs up to a RTX 2060 Super (which is the limit) and might explain why all the configurations of AMD Renoir laptops we saw topped out at an NVIDIA RTX 2060.